Machine Numbers and True Values
In digital systems, data is stored in binary format. A Machine Number is the binary representation of a value within the computer's storage, where the Most Significant Bit (MSB) is designated as the sign bit. A '0' in the sign bit indicates a positive value, while a '1' indicates a negative value.
For example, consider an 8-bit system:
- The decimal number +5 is represented as
0000 0101. - The decimal number -5 is represented as
1000 0101.
The binary pattern 1000 0101 has an unsigned decimal value of 133. However, because the MSB indicates a negative sign, the actual numeric value, or True Value, is -5.
Sign-Magnitude Representation
The Sign-Magnitude method is the most straightforward encoding scheme. The first bit represents the sign, and the remaining bits represent the absolute value of the number.
Sign-Magnitude of +1: 0000 0001
Sign-Magnitude of -1: 1000 0001
Using this scheme, the range of an 8-bit integer is limited to [-127, +127]. A significant drawback is the existence of two representations for zero: positive zero (0000 0000) and negative zero (1000 0000).
One's Complement
In the One's Complement system, positive numbers remain identical to their Sign-Magnitude counterparts. For negative numbers, the sign bit remains '1', but the magnitude bits are inverted (0s become 1s and vice versa).
One's Complement of +1: 0000 0001
One's Complement of -1: 1111 1110
While this improves arithmetic operations, it still suffers from the dual zero problem (0000 0000 and 1111 1111).
Two's Complement
Two's Complement is the standard method for representing signed integers in modern computers. Positive numbers are unchanged. To find the representation of a negative number, invert all bits of the absolute value (including the sign bit conceptually) and add 1.
Two's Complement of +1: 0000 0001
Two's Complement of -1: 1111 1111
This method eliminates the negative zero. The pattern 1000 0000, which would have been -0, now represents -128. Consequently, the range for an 8-bit integer expands to [-128, +127].
Excess-N Notation
Excess-N (or Biased notation) is typically used for the exponent part of floating-point numbers. It maps the actual value to an unsigned integer by adding a constant bias (usually $2^{n-1}$).
For instance, if the bias is 128 for an 8-bit exponent:
- A true value of +5 corresponds to $128 + 5 = 133$ (
1000 0101). - A true value of -5 corresponds to $128 - 5 = 123$ (
0111 1011).
Interestingly, the Excess-N representation can be obtained by simply inverting the sign bit of the Two's Complement representation.
The Arithmetic Advantage of Two's Complement
The primary reason computers adopt Two's Complement is that it unifies addition and subtraction logic. Let us compute 1 - 1 using different representations.
Using Sign-Magnitude:
0000 0001 (+1)
+ 1000 0001 (-1)
-----------
1000 0010 (Result: -2, which is incorrect)
Simply adding the bits yields an incorrect result because the sign bit interferes with the magnitude calculation.
Using One's Complement:
0000 0001 (+1)
+ 1111 1110 (-1)
-----------
1111 1111 (Result: -0)
The result is mathematically sound but conceptually redundant due to the existence of two zeros.
Using Two's Complement:
0000 0001 (+1)
+ 1111 1111 (-1)
-----------
0000 0000 (Result: 0, ignoring the overflow bit)
Here, the arithmetic logic unit (ALU) can treat subtraction as addition. The overflow is discarded, leaving a clean single zero representation.
Mathematical Foundation: Modular Arithmetic
The effectiveness of Two's Complement stems from modular arithmetic. Consider a clock with 12 hours. To move from 6 o'clock to 4 o'clock:
Method A: Turn back 2 hours (6 - 2 = 4).
Method B: Turn forward 10 hours ((6 + 10) mod 12 = 4).
Subtracting 2 is equivalent to adding 10 modulo 12. We say that -2 and 10 are congruent modulo 12.
In an 8-bit computer system, arithmetic operates modulo $2^8$ (256). The number -1 is congruent to 255 modulo 256.
-1 ≡ 255 (mod 256)
The binary form of 255 is 1111 1111, which is exactly the Two's Complement representation of -1. This mathematical property allows the computer to replace subtraction operations with addition, simplifying hardware design while ensuring correct results.