Flash Memory Organization

STM32F1 series microcontrollers incorporate three flash memory sections: program memory, system memory, and option bytes. The flash memory interface peripheral enables erase and programming operations for both program memory and option bytes.

Common applications for flash read/write operations include:

• Storing non-volatile user data in unused program memory space
• Implementing in-application programming (IAP) for self-updating firmware

In-circuit programming (ICP) updates the entire program memory through JTAG, SWD protocols, or the system bootloader. In-application programming utilizes any supported communication interface for firmware updates.

Memory Architecture

Device variants are categorized by flash capacity:

• Low-density: 16KB to 32KB
• Medium-density: 64KB to 128KB
• High-density: 256KB to 512KB

Note: The flash memory interface peripheral exists separately from the actual flash storage.

Flash Memory Interface Structure

Direct memory access is achieved through pointer operations:

// Read 16-bit data from specific address
uint16_t value = *((__IO uint16_t *)(0x08000000));

// Write 16-bit data to specific address
*((__IO uint16_t *)(0x08000000)) = 0x1234;

#define __IO volatile

For improved code organization, data reading functions can be encapsulated:

uint32_t flash_read_word(uint32_t addr)
{
    return *((__IO uint32_t *)(addr));
}

uint16_t flash_read_halfword(uint32_t addr)
{
    return *((__IO uint16_t *)(addr));
}

uint8_t flash_read_byte(uint32_t addr)
{
    return *((__IO uint8_t *)(addr));
}

Program Memory Operations

Flash Protection Mechanism

The Flash Program/Erase Controller (FPEC) utilizes three key values:

• RDPRT key: 0x000000A5
• KEY1: 0x45670123
• KEY2: 0xCDEF89AB

Unlock sequence: After reset, FPEC remains locked. Writing KEY1 flolowed by KEY2 to FLASH_KEYR unlocks the controller. Incorrect unlock sequences permanently lock FPEC and FLASH_CR until the next reset.

Lock operation: Setting the LOCK bit in FLASH_CR secures both FPEC and FLASH_CR.

Using standard library functions simplifies these operations:

FLASH_Unlock();  // Unlock flash
FLASH_Lock();    // Lock flash

Mass Erase Operation

void flash_erase_all_pages(void)
{
    FLASH_Unlock();
    FLASH_EraseAllPages();
    FLASH_Lock();
}

Page Erase Operation

void flash_erase_page(uint32_t page_addr)
{
    FLASH_Unlock();
    FLASH_ErasePage(page_addr);
    FLASH_Lock();
}

Programming Operations

void flash_program_word(uint32_t addr, uint32_t data)
{
    FLASH_Unlock();
    FLASH_ProgramWord(addr, data);
    FLASH_Lock();
}

void flash_program_halfword(uint32_t addr, uint16_t data)
{
    FLASH_Unlock();
    FLASH_ProgramHalfWord(addr, data);
    FLASH_Lock();
}

Option Bytes Configuration

Option bytes include several configuration parameters:

• RDP: Read protection control (unlock with 0x000000A5)
• USER: Watchdog and power mode reset behavior
• Data0/1: User-defined storage
• WRP0/1/2/3: Write prtoection settings

Note: nUSER and similar fields represent inverted values.

Write protection granularity assigns each bit to protect four memory pages (1KB per page):

Medium-density devices (128KB total):

• WRP0: Pages 0-31
• WRP1: Pages 32-63
• WRP2: Pages 64-95
• WRP3: Pages 96-127

High-density devices (512KB total):

• WRP0: Pages 0-15
• WRP1: Pages 16-31
• WRP2: Pages 32-47
• WRP3: Bits 0-6 protect pages 48-61; Bit 7 protects pages 62-255

Option Byte Programming Process

1. Verify FLASH_SR BSY bit indicates no active operations
2. Unlock FLASH_CR OPTWRE bit
3. Set FLASH_CR OPTPG bit
4. Write half-word data to target address
5. Wait for BSY bit to clear
6. Verify written data by reading back

Option Byte Erase Process

1. Confirm FLASH_SR BSY bit shows no ongoing operations
2. Unlock FLASH_CR OPTWRE bit
3. Set FLASH_CR OPTER bit
4. Set FLASH_CR STRT bit
5. Wait for BSY bit to clear
6. Verify erased data by reading back