x86-64 Machine-Level Program Representation: Registers, Instructions, and Control Flow

x86-64 Register Set and Usage The x86-64 architecture includes 16 general-purpose registers that store 64-bit values. While these register are general-purpose, they follow conventional usage patterns. The registers r8 through r15 were added in the 80386 architecture extension. %rax: Return value register %rbx: Callee-saved register %rcx: 4th f ...

Posted on Sun, 24 May 2026 18:01:07 +0000 by Bilbozilla

x86 Protected Mode: Global Descriptor Table and Segmentation

GDT and Segmentation Mechanism At boot, x86 CPUs operate in real mode using segmented addressing: segment register × 16 + offset register yields physical addresses. This legacy approach lacks security features and modern multitasking support. In protected mode, all 32 address lines become active, enabling 4GB physical addressing. Memory segment ...

Posted on Thu, 21 May 2026 21:06:38 +0000 by jb489

Understanding Function Call Stack Basics

Program execution can be understood as a series of function calls. Every user-mode process (where user-mode refers to CPU instruction set privilege ring 3, where applications run) corresponds to a call stack structure. When a function finishes executing, it automatically returns to the next instruction of the calling function (via the call inst ...

Posted on Tue, 19 May 2026 18:21:09 +0000 by cbj4074

64-bit Assembly Execution Deep Dive: Function Call Mechanics and Stack Frame Management

Function Call Mechanism A fundamental question that often arises: When function A calls function B, how does B know where to return after completion? Consider the following code snippet where main invokes compute. Once compute finishes execution, control must flow back to main's return statement. But these two functions are separate entities—ho ...

Posted on Thu, 14 May 2026 04:05:49 +0000 by zild1221