Integrating PL Designs with the PS via AXI4

This guide details the process of integrating custom hardware designs created in the Programmable Logic (PL) with the Processing System (PS) of a System-on-Chip (SoC) using the AXI4 interface. The core principle involves creating a custom AXI4-compliant IP core from the PL design, which can then be accessed by the PS. Creating a Custom AXI4 Per ...

Posted on Wed, 20 May 2026 07:44:43 +0000 by danxavier

Classification and Characteristics of On-Chip and System-Level Interconnects

Introduction Modern computing systems encompass various interconnection structures within CPUs, SoCs, boards, and between boards. These are predominant bus-based architectures. To understand how "consistency" and "coherence" relate to internal CPU interconnects, categorizing these structures becomes essential. Components in ...

Posted on Fri, 15 May 2026 17:23:44 +0000 by kkobashi