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STM32F103 GPIO Programming Fundamentals Overview In the previous article, we discussed the reset and clock configuration for the STM32F103C8T6 minimal system. At this point, the system clock (SYSCLK) has been configured to 72MHz through a 9x multiplication of the external 8MHz high-speed oscillator (HSE) using the PLL. With the minimal system ...

Core Functionality The Real-Time Clock (RTC) module serves as the temporal backbone for embedded operating systems. It maintains accurate system time and supports scheduled alarm events. Leveraging an external backup power source, the RTC preserves timekeeping operations during system shutdowns. Upon power restoration, it synchronizes the OS cl ...

Setting Up Micro-ROS in STM32CubeIDE Begin by adding the following Micro-ROS source files to your project's Core/Src directory: extra_sources/microros_time.c extra_sources/microros_allocators.c extra_sources/custom_memory_manager.c extra_sources/microros_transports/dma_transport.c After copying these files, right-click on your project in ST ...

Developing embedded systems for international markets introduces complexities in time management and character encoding. A significant issue arises when devices designed for one specific region are deployed globally, as hardcoded time offsets result in incorrect local time display.For instance, a device originally configured for the China Stand ...

CubeMX Configuration Configure the STM32F407 project in STM32CubeMX with required peripherals (e.g., USART1 for console) and generate code using the Low-Layer (LL) drivers instead of HAL. Code Modifications Include RT-Thread Header In source files that use RT-Thread APIs, add: #include <rtthread.h> Declare System Clock Function In ma ...

DS1302 Real-Time Clock Implementation The DS1302 communicates via a three-wire synchronous serial interface consisting of Clock (CLK), Data (IO), and Chip Enable (CE) lines. The device stores time data in Binary-Coded Decimal (BCD) format, requiring conversion for standard decimal display. BCD Conversion Logic: Decimal to BCD: bcd_value = (dec ...

Initialization Sequence Configuring the DW_apb_uart for data transmission and reception requires a specific sequence of register writes. The standard setup procedure is outlined below: Set up the Modem Control Register (MCR) to define operational modes such as SIR, automatic flow control, loopback, and modem output states. Enable divisor latch ...

The LCD1602 is a character-oriented liquid crystal display capable of rendering two lines of 16 alphanumeric symbols per line. Its internal architecture divides each character cell into 5x7 or 5x10 vertical dot grids. Due to rigid spatial spacing and the absence of pixel-level control, complex graphical rendering is unsupported. Direct communic ...

Reset Mechanisms STM32 microcontrollers support three primary reset categories: system reset, power-on reset, and backup domain reset. System reset encompasses five different reset sources, with the NRST pin reset being the most commonly used method in minimum system designs. This hardware reset triggers when the NRST pin is pulled low, resetti ...

Kernel Space GPIO ManipulationFor the FMQL45T900 platform based on the Zynq-7000 architecture, controlling pins from the kernel space requires determining the correct GPIO index. When utilizing EMIO5 exported from Vivado, the corresponding system GPIO number calculates to 431. The device tree mapping for this pin appears as <&portc 5 0x0 ...